The present invention relates to a communication control apparatus used in a local area network (LAN) system or other small scale network. The invention particularly relates to LAN systems or the like installed in a moving body such as a vehicle.
FIG. 1 is a schematic of a conventional LAN system to be installed in a vehicle. FIGS. 2 and 3 are block diagrams showing the inner configuration of LAN ICs 2a and 3a, respectively. ALAN IC is a communication control apparatus for connection to LAN wiring. Generally, a plurality of terminals are connected to LAN wiring.
In the example of FIG. 1, FIG. 2 and FIG. 3, four terminals 41, 42, 43 and 44 are connected to transmission line 1, the LAN wiring. Each of the terminals 41, 42, 43 and 44 has a LAN IC and a microprocessor unit. An explanation of terminals 42 and 43 is given below.
LAN ICs 2a and 3a of terminals 42 and 43, respectively, are connected to transmission line 1. LAN ICs 2a and 3a are respectively connected to microprocessor units (MPU) 2b and 3b. Each MPU 2b and 3b produces and processes communication data. Actuator 20, driven by MPU 2b, is connected to MPU 2b of terminal 42. Switch 30 is connected to MPU 3b of terminal 43.
LAN ICs 2a and 3a are configured as shown in FIG. 2 and FIG. 3, respectively.
LAN IC 2a (and 3a) is provided with an oscillator 12, MPU interface circuit 11, MPU input transmission buffer register 5, transmission signal composing circuit 6, transceiver 9, reception signal decoding circuit 8, and MPU output reception buffer register 10. Oscillator 12 creates an internal system clock for the IC. MPU interface circuit 11 is an interface with MPU 2b (or MPU 3b). MPU input transmission buffer register 5 temporarily stores data to be transmitted from MPU 2b (or MPU 3b). Transmission signal composing circuit 6 converts the data to be transmitted into communication frame format. Transceiver 9 is physically connected to transmission line 1. Reception signal decoding circuit 8 reads communication frame format transmitted and received on transmission line 1. MPU output reception buffer register 10 temporarily stores unique address assigned to terminal 42 (LAN IC 2a) (or to terminal 43 (LAN IC 3a)).
FIG. 4 shows an example of the communication frame format transmitted and received on transmission line 1. The communication frame format is composed of code SOF (Start of Frame) 101 which indicates the start of the frame, code A (priority code) 102 which authorizes the occupation of transmission line 1, code B (destination address) 103 which indicates a destination of the transmission, code C (self address) 104 which indicates the transmission source, code D (data) 104 that is the data to be transmitted, error detecting code E (CRC error detecting code) 106, EOD (End of Data) 107 which indicates the end of the transmission data, and code F (IFR:In Frame Response) 108 which is the ACK/NAK code sent back from the data-receiving terminal which has received the data. The communication frame format terminates with code EOF (End of Frame) 109.
The operation of the above-mentioned conventional LAN IC is given below.
Referring to FIG. 3, the transmitting operation is explained. It is assumed that when switch 30, connected to MPU 3b of terminal 43 is turned on, terminal 43 composes data indicating that switch 30 is turned on into the communication frame and transmits it to terminal 42.
When switch 30 is turned on, the event is detected by MPU 3b, then the transmission data is written into MPU input transmission buffer register 5 using MPU interface circuit 11 in LAN IC 3a. The transmission data which MPU 3b writes into MPU input buffer register 5 is as follows: the priority code that indicates the occupation authorization of transmission line 1 is stored in field 5a, the destination address which indicates the transmission destination is stored in field 5b, the self address which indicates the transmission source is stored in field 5c, and the data which indicates that the switch is turned on is stored in fields 5d through 5e.
The unique address assigned to terminal 42, that is, the self address of terminal 42, is written into field 5b of MPU input transmission buffer register 5 as the destination address indicating the transmission destination. MPU 3b has been previously programmed to write data into MPU input transmission buffer register 5 when it detects that switch 30 has been turned on.
After all the transmission data is written into the fields of MPU input transmission buffer register 5, transmission signal composing circuit 6 composes a communication frame (as shown in FIG. 4, for example), computes and adds a CRC code, then transmits that communication frame over transmission line 1 using receiver 9.
Referring to FIG. 2, the receiving operation is explained. It is assumed that terminal 42 activates actuator 20 connected to MPU 2b when terminal 42 receives the communication frame which includes data indicating that switch 30 in terminal 43 has been turned on.
In LAN IC 2a in terminal 42, transceiver 9 inputs the communication frame on transmission line 1 to reception signal decoding circuit 8. Reception signal decoding circuit 8 compares code B 103 (the destination address) in the communication frame with its self address, a unique address previously written in self address register 7. When the two addresses match, terminal 42 recognizes that the communication frame was sent to itself.
Reception signal decoding circuit 8 decodes the received communication frame and writes priority code 102 into field 10a in MPU output reception buffer register 10, destination address code 103 into field 10b, self address code 104 into field 10c and the transmission data into fields 10d through 10e. The transmission data indicates that switch 30 has been turned on. The destination address written into field 10b in MPU output reception buffer register 10 is identical with the self address written in self address register 7 in LAN IC 2a, and the self address written in field 10c is the unique address (that is to say, the self address) assigned to LAN IC 3a of terminal 43, the transmission source.
After reception signal decoding circuit 8 receives the communication frame without error and after the above data are written into MPU output reception buffer register 10, MPU 2b reads it out as the reception data via MPU interface circuit 11.
Thus, from the reception data read out from LAN IC 2a, MPU 2b recognizes that the communication frame is transmitted from terminal 43 to itself (terminal 42) and that switch 30 in terminal 43 is turned on. In response to this fact, MPU 2b activates actuator 20. This operation is programmed into MPU 2b beforehand.
In the conventional communication control apparatus above, for a simple signal transmission such as actuator activation in response to a switch's turning on or off, it is necessary for the microprocessor unit (MPU) to process that switch's turning on and off and to write transmission data into the LAN IC. Therefore, an increased load on the MPU results. Moreover, there must be a an MPU and a LAN IC for each of the switch and the actuator. The outcome is a large, heavy and complicated system with a high manufacturing cost.